The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Single port memory and dual-port memory provide respectively single port or dual-port access to each cell of a corresponding memory array. Example types of these memories include register file single port (RF1P) memory, static random-access memory (SRAM) single port (SR1P) memory, register file dual-port (RF2P) memory, and SRAM dual-port (SR2P) memory. SR2P memory is most vulnerable to port-to-port interactions, which can cause intermittent failures. Intermittent failures lead to quality issues and an increased number of defective parts per million (DPPM) and as a result customer return issues.